Circuit Analysis

Site: Teach Me Printed Circuit Board Design
Course: Learn Board Layout by Designing a Badge
Book: Circuit Analysis
Printed by: Guest user
Date: Tuesday, 9 August 2022, 4:02 PM

Description

Before you layout a circuit, it's generally a good idea to understand what is happening in your schematic.  And before you lay out a schematic, it's generally a good idea to understand what is happening in your block diagram.

Hard Way Hughes"This book is a bit technical.  If you are a beginner, it's okay that you don't understand everything that follows -- your first project will still be successful.  Try to pick up as much as you can, and ask questions in the forums!"

1. Overview

This is the basic block diagram for our circuit.  The job of an electrical engineer is to determine how to make each of the blocks and each of the data buses work correctly without interfering with any of the other parts of the circuit.  In the chapters that follow, we will look at each circuit element in greater detail.  Each block is converted to a schematic.

Circuit Overview

Block Diagram of Schematic Components

Power

The power for our circuit is delivered by batteries -- either four AAA size batteries or a LiPo battery pack (your choice).  The batteries feed a low-dropout (LDO) linear regulator that provides 5V to power the addressable RGB LEDs as well as a 3.3V LDO that powers the rest of the circuit.  A logic-level translator will convert the Mega's 3.3V logic outputs to 5.0V logic inputs.

Serial Data Bus

Four serial data buses are present in our circuit and are used to transfer information. 

  • A Serial-Peripheral Interface (SPI) bus that communicates with the TFT module
  • Universal Asynchronous Receive & Transmit (UART) that is used to program the microcontroller
  • I2C that communicates with our sensors and Real-Time Clock (RTC) module
  • A Universal Serial Bus that is used to communicate with an external computer for programming and debugging.

GPIO Pins

  • Several pins will be used to command the Addressable RGB LEDs, read the status of push-buttons, and activate a piezo-buzzer.

Block Interaction

Each of our blocks will be independently designed and connected to the main microcontroller.  There are several common ways to do this (such as with global nets and connector ports), but the one that might make the most sense is a hierarchical block overview that closely follows the artistic block diagram shown above.  Most designers don't do this with a first circuit since it takes additional time and hides portions of the circuit off-page, but it works well with the EDAs used in this course.  With this design technique, each circuit block shown above is designed independently on a hierarchical page and then connected to the top-level via hierarchical connectors.  In a hierarchical layout, only the connections between the blocks are shown on the top level (inputs, outputs, switch lines, etc...).  Oftentimes you'll see power connections included as well.  We left those off of this connection to reduce the clutter and hopefully increase the clarity of the digital connections.

HBOverview

This hierarchical block view shows the connections between the various parts of the schematic.  Each block represents a separate page of the schematic.

2. Power System Overview

Power will be delivered to our circuit via three sources:

  • Batteries
    • (6V) 4 AAA batteries, or
    • (7.2V) a LiPo Battery
  • (5V) a USB connection to a computer during programming
  • (3V) a small coin-cell battery (2032) used to keep the Real-Time Clock working when the device is turned off.

You are responsible for supplying the batteries used in your design.

Unless you are a fan of fire, it is not a good idea to use multiple power sources at once.  Engineers cannot depend on users to remember to disconnect one source before they connect another.  Passive or active measures must be used to prevent multiple sources from powering the circuit at the same time.  The simplest option is to use a break-before-make selector switch.  Adding a switch increases the BOM cost, and mechanical devices are prone to failure.  Our BOM cost is already higher than we'd like.  So Bob decided to get creative. 

Bob's Secret Source Selector

We'll cover this in greater detail in the sub-chapter "MOSFET Magic."  But Bob used a series of MOSFETs to electronically decided which power source to select.  A battery connected to J201 feeds a 5V LDO.  As long as only the battery is plugged in and the switch is on, the battery feeds the 5V0 net and the 3.3V LDO.

Bob's Power Selection Circuit

Bob's Power Selection Circuit prioritizes a battery connected at J201

Mark's Battery Selector Footprint

Hard Way Hughes"Dr. Bob might be playing chess with circuit elements, but I'm still out here hitting rocks with hammers.  I came up with a hopefully simple solution"

I created a footprint that superimposes JST-PH connector and two 0.1"-pitch Plated-Through-Hole (PTH) pads.  The footprint was intentionally designed with the 0.1"-pitch holes placed directly beneath the front opening of the JST-PH connector to prevent multiple sources from being connected at once.  

The battery selector footprint ensures that either a JST-PH connector or a 0.1" header is used, but not both.

Adafruit's JST-PH connector

Adafruit's JST-PH battery selector footprint.

The footprint makes it difficult if not impossible to connect multiple batteries, which reduces the chance for a short circuit.

USB Power Delivery

Another possible way power can enter the board is through the USB connector.  The USB2.0 specification only guarantees 500 mA of current at 5V, which should run our board -- but that 500 mA only comes after negotiation with a host device.  The default is 5V @ 100 mA.  We will depend on the batteries whenever they are available to prevent tripping a computer's built-in current-limiting safety circuits.

2.1. MOSFET Magic

Understanding Dr. Bob's Source Selector

Let's take a look at the four options available for power sources.  Nothing attached, only battery power, only USB Power, and both usb and battery power.

Option 1:  Nothing attached

Hard Way Hughes

"Just a reminder, 'closed' means conducting and 'open' means non-conducting."

Transistor Switch Status
Q1 Q2 Q3 Q4
Closed Closed Closed Closed

Source Selector

As you can imagine, nothing happens.  P-channel MOSFETs behave as a normally closed (conducting) switch that opens (non-conducting) when a voltage is present at the gate.  Since no voltage is present at the gate of Q1, Q2, Q3, or Q4, the "switches" are all closed and any current that arrives will be readily conducted.

Option 2:  Only Battery Attached

Transistor Status
Q1 Q2 Q3 Q4
Open Open Closed Closed

Source Selector Option 1

With the battery attached and the switch turned on, current flows through to the 5.0V LDO and through Q3 and Q4 to the 3.3V LDO and out to the rest of the circuit.  R3 keeps the gate potential of Q3 and Q4 at 0V.  At the same time, the gates of Q1 and Q2 are energized, stopping reverse conduction of current through the circuit.

Option 3:  Only USB Attached

Transistor Status
Q1 Q2 Q3 Q4
Closed Closed Open Open

Source Selector Option 2

With the USB power connected, R2 keeps the gate of Q1 and Q2 and ground potential, which keeps Q1 and Q2 conducting current between the source and drain.  At the same time, the gates of Q3 and Q4 are connected to the net that connects Q1 and Q2, closing the conducting paths between Q3 and Q4 drain and source, which prevents the backward flow of current.

Option 4:  Both Sources Attached

Transistor Status
Q1 Q2 Q3 Q4
Open Open Closed Closed

Source Selector Option 3

When both sources are energized, the 5.0 V LDO generates a potential difference at the gates of Q1 and Q2, shutting off the conduction path across the drain and source, stopping USB_VBUS current before it ever gets a chance to enter the rest of the circuit.

Summary

Dr. Bob's Battery Selector circuit prefers the 5V LDO over USB.  If either source is energized, power will be delivered to the rest of the circuit.

3. Data Bus Overview

Communication Protocols

Serial data moves through a circuit from source to destination as a series of changing voltages.  The sender(s) initiates the change on the signal line and the receiver detects that the potential has changed.

There are a variety of protocols that are in common use in the industry: ATA, SCSI, CAN, I²C, SPI, UART,  RS232, RS485, USB, Ethernet, Microwire, 1-wire, etc...  But commercial sensors predominantly use I²C and SPI, so those are the protocols we chose for this project.

Synchronous

Synchronous communication requires a minimum of two signal lines: one line transfers data, the other transfers the clock signal.  This type of communication is used in the SPI and I²C data buses in our circuit.

Asynchronous

Asynchronous communication requires a minimum of one signal line.  However, the clock frequency must be agreed to by both the sender and receiver before communication can be successful.  Our circuit's UART bus that connects the SAMD11 and the ATMEGA328P is an example of an asynchronous signal line.

The next several chapters will discuss the I2C, SPI, UART, and USB busses in greater detail.

3.1. I²C

Overview

The Real-Time Clock, BNO055, and BME280 all communicate with the ATMega328 via I²C.

The Inter-Integrated Circuit (I2C or I²C) protocol uses two data lines: clock and data.  The Serial Clock Line (SCL) transmits the timing information while the Serial DAta line (SDA) transmits the bits of data.  Either the master or the slave can trigger the data line, but only the master controls the clock.  This allows for half-duplex communication between master and slave.

I2C data bus example

This animation of an I2C transaction is courtesy AllAboutCircuits.com

Hard Way Hughes"A major misconception perpetuated by textbooks is the use of ideal square-waves in all design examples.  These square waves are easy for authors to draw, but do not force students to think about the real-world effects of noise and impedance on signal propagation.  Real circuits never have perfectly square edges.  Noise, changes in impedance, cross-talk, etc... all keep the "square-waves" drawn in textbooks from ever appearing "square" in an actual circuit."

Advantages

One of the advantages of the I²C protocol is that it is a multi-master, multi-slave protocol.  Several microcontrollers can be on a bus and read the same sensor data, provided they aren't both controlling the clock signal at the same time.  Usually, I²C is used by a single microcontroller to communicate with several slaves, such as EEPROM, sensors, displays, etc...

Disadvantages

Address Collisions

Many of the devices on the I²C bus have 7-bit addresses.  With only <128 possible addresses (2^7=128, but not all addresses are used), it's entirely possible to select two devices with identical addresses.  Fortunately, most manufacturers provide a workaround by adding an address (ADDR) or multipurpose (MP) pin to their design that allows designers to change the address by changing the logic level of a pin.

Capacitance

A second disadvantage is that high bus capacitance negatively impacts the maximum data rate.  The I²C bus is meant for relatively slow, short-distance communication on a single board.  While it can sometimes tolerate transmission via discrete wire connections to other boards, it is not designed for that purpose, especially at high speeds.

I²C Engineering Considerations

I²C master devices will pull the logic-signal directly to ground potential, and allow the pull-up resistors to bring the logic levels to Vcc potential.  The logic-high to logic-low transition is fast and looks quite a bit like a square-waveform on an oscilloscope.  But the logic-low to logic-high transition is mediated by the bus capacitance and the selection of pull-up resistors.

In the case of the I²C example, the RC-constant of the logic-high transition is the limiting factor in bus-speed.  The resistance is provided largely by two pull-up resistors as well as a minor amount of trace resistance.  The capacitance is the sum of trace capacitance, pin capacitance, and any other stray capacitance along the signal path.  The I2C specification limits the maximum capacitance to 400 pF for standard (100 kHz) and fast mode (400 kHz), and 500 pF for fast mode plus (1 MHz). 400 pF is not a lot of capacitance.  An individual I/O pin might have a capacitance of 2-10 pF, and a 6 mil trace increases capacitance by a little less than 2 pF/inch in FR-4 material above a ground plane. 

Binary Logic

Binary logic has two states: high and low.  The logic high state of an integrated circuit might be any potential difference between 70% and 100% of Vcc, and the logic low state is often any potential difference between 0 and 30% of Vcc.  In between 30% and 70% the logic is undefined.  (These aren't the only logic thresholds, but are a good starting point for explanation sake.)

I2C Practical

This is a slightly more realistic I2C clock signal.  Image courtesy AllAboutCircuits.com

When the bus capacitance gets too high, the rising signal is unable to reach the logic-high state before the master device's logic-state changes and the signal falls back into a logic-low state.  

I2C with too much capacitance.

This image shows the effects of too much capacitance and too much resistance which prevents the signal from ever reaching a logic-high state.  Image courtesy AllAboutCircuits.com

Resistor Selection

To ensure that the signals reach the logic-high state in time, you should use a low-value pull-up resistor.  But if the resistor value is too low, you risk running too much current through your microcontroller, and you will dissipate a great deal of energy every time you run an I²C transaction.  Ideally, you will calculate the value of your pull up resistor based on the bus-capacitance and the I²C mode rise-time (standard, fast, or fast-mode plus). 

Remember to choose a resistor in the E-24 series to keep costs down.  See Chapter 5 "What is Inside a Passive Package?" in the lesson "What is Circuit Design?" to learn more.

R_{\text{Pull Up Max}}=\frac{t_{\text{Rise Time}}}{Ln\left ( \frac{V_{\text{cc}}−V_{\text{Logic Low}}}{V_{\text{cc}}−V_{\text{Logic High}}} \right )\cdot C_{\text{bus}}}

The minimum resistor is much easier to calculate.  The pins on your master and slave devices have maximum source/sink specifications listed in their datasheets.  Find the lowest-value sink specification and use Ohm's law to calculate the minimum resistance.

R_{\text{Pull Up Min}}=\frac{V_{\text{Bus Voltage}}}{I_\text{Maximum Sink Current}}

To see more about how to calculate the I2C bus capacitance and resistance, see the article I wrote entitled I2C Design Mathematics: Capacitance and Resistance over at AllAboutCircuits.com

 

3.2. SPI

Overview

The ATMega328 communicates with the display through the SPI bus.

The Serial Peripheral Interface (SPI) is a bi-directional, synchronous data transfer protocol.  This protocol requires at least three data lines, Master In Slave Out (MISO), Master Out Slave In (MOSI), and Clock (CLK).  An optional data line called Slave Select Not ( SS) is used to enable or disable data transmission on one or many integrated circuits.  The overline indicates that the logic for this digital input is inverted:  slave select is active, and a chip is enabled, when the logic is low.  In many designs, this digital input can be tied to the ground net to permanently enable the data bus.

This image shows the Daisy-Chain configuration where data is passed from one microcontroller to the next.  A multiple-slave select option is also available.  Image courtesy AllAboutCircuits.com

Data that is stored in a linear shift register is moved over bit by bit with each clock cycle.  SPI is a full-duplex protocol -- the sender and receiver can both transfer data at the same time.

Linear Shift Register Example

This animation shows individual bits moving through registers A and B.  Image courtesy AllAboutCircuits.com

If you were to watch the signals transition on an oscilloscope -- you would see data on both the MOSI and the MISO lines.

SPI Data transaction

SPI Transaction courtesy AllAboutCircuits.com

To learn more about SPI -- visit AllAboutCircuits.com

In Our Circuit

Data lines

The Data Lines and LCD Connector on our Badge Design

We obviously have more than three lines connecting our display to our badge.  And Bob is actively working to replace this display with one that has a simpler connector of 6 or 8 pins.

LCD_FONT_nSELECT:  We ordered displays with additional font-chips soldered to the back of them.  This net allows us to enable that font chip by tieing to logic low.  It might not be a bad idea to tie this net to the 3.3V rail through a 10k resistor.  But we left it off for now since the firmware isn't yet configured to work with the font chip.

SPI_MISO: The master-in-slave-out sends information from the LCD display to the microcontroller.  Currently, that's just some diagnostic information.  But it's certainly possible that someone might get the microSD card slot working, and information would transfer from the data card back to the microcontroller along this line.

SPI_MOSI: The master-out-slave-in data line transfers information from the microcontroller to the LCD panel.  This is how we transfer information to the display.

LCD_DC: This pin is used to change the operating mode of the display between data and command.  One mode transfers the text that will appear on the screen, while the other instructs the LCD on how to behave.

SPI_CLK: The SPI_CLK line is cycled with each bit of information transferred.  The signal lets the LCD display know when to sample the data line to look for logic-high or logic-low.

LCD_nCS: The last element of the SPI data bus, the LCD_nCS is equivalent to SS shown above, it's just another style of writing it. Since overlines are not supported in all graphics / texts programs, it's very common to see the letter "n" prefix instead of the overline. "nCS" is equivalent to CS, in this case, CS stands for Chip Select rather than Slave Select.  

3.3. USB

Overview

The Universal Serial Bus specification relies on differential pair signaling to transfer data along its length at high speeds.  A differential pair consists of two digital signal lines that have the same amplitude but opposite polarity.  Our circuit does not necessarily require special handling of the differential pair signals, but we will talk about them nonetheless.  And since this is not a course on signal integrity, I'll spare you the physics for now.  But feel free to ask questions in the forums.

Design Rules

For a differential pair to work as intended, the individual traces need to have consistent width and have consistent spacing to other conductors, and the two traces should remain as identical as possible -- following an identical path and have identical length.  The general idea is that a Low→High transition needs to propagate along the wire parallel to and at the same time as a High→Low transition.  The electric fields are confined tightly between the two traces if the two signals travel the same distance over the same dielectric.

This animation shows the electric fields surrounding two opposite polarity pulses (red and green cylinders) moving through two parallel wires.  As long as the opposite polarity pulses are timed properly, the electric fields remain tightly confined to the area around the wires.  (Similar graphics at AllAboutCircuits.com)

If the traces/wires are not the same lengths, or if the impedance changes in the surrounding environment, the symmetry between the two wires is lost, and one transition will lead or lag the other.  When the two wires have the same polarity, the electric fields repel and can spread further from the wires.

This animation shows the electric fields surrounding two similar polarity pulses (red and green cylinders) moving through two parallel wires.  The electric field lines here are repulsive. 

Electromagnetic interference is the result of rapidly changing electromagnetic fields.  If the field lines in the first animation switch to look like the second animation, or back again, the electromagnetic field disturbance will propagate outwards from your traces to other areas of your circuit, or into the broader environment.

So the purpose of differential-pair routing is to ensure that the two wires stay as symmetric as possible over as equal a distance and as short a distance as possible.

In Our Circuit

In our circuit, we have a USB2.0 connection between the SAMD11, ESD Diodes, and the MicroUSB.  USB2.0 doesn't have terrifically fast rise/fall times, so as long as we make a minimal effort to route the traces properly, we should be okay.  We don't even really need to concern ourselves with an impedance controlled stackup.  

SamD11USB

Parts and pins have been selected to ensure you can route the two nets USB_DP and USB_DM in a single layer from the SAMD11 to the MicroUSB connector straight through D501, the ESD protection diodes.

When creating your layout -- route the differential pair (red) wires to the off-board connector first.

3.4. UART

Overview

The Universal Asynchronous Receive and Transmit protocol allows full-duplex communication between two nodes.  The only requirement is that the two nodes agree upon a common transmission rate (BAUD rate).

Unlike the other communication protocols used in our design, UART requires a cross-over connection. Transmit→Receive and Receive→Transmit.  

UART Connection

Uart Connection from CircuitBasics.com shows a cross-over connection between the two ICs.

Since it has a relatively slow transmission rate, UART data lines can run the full length of an entire PCB panel and off-board through several meters of wiring without much an issue.

Asynchronous communication nodes are usually tolerant of a slight timing mismatch.  But if the transmission rates are too different than receiving rates, the information ends up garbled.  If you ever see random characters or no characters on a serial-debug screen, the usual culprit is a timing mismatch.  

In Our Circuit

The only UART line connects the SAMD11 microcontroller to the ATMega328 microcontroller.  

4. IMU Sensor

BNO055 Connections

BNO055 Schematic Block

Basic Function

The BNO055 inertial measurement unit by Bosch has three types of tri-axial sensors: Accelerometer, Gyroscope, and Magnetometer.  To increase accuracy, a 32.768 kHz MEMS oscillator is included and must be enabled via register flags.

Circuit Considerations

Two pull-up resistors attached to nBoot_Load_Pin and nReset set digital inputs and operating mode while a series of capacitors provide decoupling.  Four taps are provided for data bus inspection.

The datasheet notes that the sensor's sensitive magnetometer should be mounted well away from any ferromagnetic materials.  Place this device as far away from the LCD, header pins, badge clips, and batteries as possible.  One other thing -- the sensor package is rather inaccurate before calibration.  Be sure to follow the Bosch calibration guidelines before using your device.

5. Environmental Sensor

BME280 Circuit

Of all the integrated circuits on the board, this is perhaps the easiest one to implement.  Simply place one decoupling capacitor at Vdd (pin8) and one decoupling capacitor at VDDIO (pin6).  Communication is via I²C, and should be relatively easy to implement.

6. Real Time Clock

RTC Circuit

RTC block from the schematic.

Real Time Clocks (RTC) are designed to keep track of seconds, minutes, hours, days, months, and years using an accurate clock source and a small power source. Some even include interrupts that can bring a microcontroller out of sleep at a particular time to perform a task.

Like the other devices in our circuit, the clock source is 32.768 kHz.  Why such a seemingly odd value across all devices?  It makes sense when you think about 32.768 Hz in binary.  215 is equivalent to B1000000000000000.

B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


The RTC circuit detects the transitions of the oscillator, and a series of flip-flops on the die go to work successively dividing the signal 15 times, until the final stage of the circuit keeps track of seconds.

Image from HyperPhysics.com

Binary counter from http://hyperphysics.phy-astr.gsu.edu/hbase/Electronic/bincount.html 

That makes sense, but why 215 instead of 214 or 216?  That likely harkens back to the days of digital watches.  215 was good enough to keep time within a minute per month.  Each additional gate costs money to fabricate on an ASIC, so the watch/clock industry settled on "good enough."  It's possible to purchase crystals at 65.536 kHz (216) and 131.072 kHz (217), but you'd need additional divider stages to work properly.

One other note:  Bob is in the process of replacing the expensive oscillators with less expensive crystals.

Hard Way Hughes"On a side note -- last year I installed 131.072 kHz in a clock designed for 32.768 kHz for a marketing gag, and it did run 4x as fast.  Unfortunately, it was too far back in the background of the camera shot -- which made it appear small and blurry, so nobody noticed.  Life is cruel."

7. Input Switches

We often think of switches as simple devices that exist in one of two states: on or off, open or closed.  And in the steady-state, long after a transition, that is how they behave. But during the transition between states, many switches tend to misbehave as their contact points make and break contact several or even dozens of times.

This image shows mechanical bouncing.  Image origin unknown.

It has to do with the way switches are designed.  Many switches are designed with springs, compliant mechanisms, or "snap-action" mechanisms that mechanically hold the switch element in place on contacts  Like a ball bouncing on the ground, the contact elements often bounce immediately after the transition. So instead of a single transition between states, there can be dozens of transitions back and forth and back again.

Rising Edge Switch Bounce from Maxim

This rising-edge contact bounce from Maxim Integrated shows around 2-dozen logic transitions.

Each transition can cause electromagnetic noise and trigger the input on an integrated circuit.  Imagine the switch above used in a counting application. Each switch press might be seen as 10 counts by an integrated circuit.

Switch Debouncing

We're electrical engineers, not mechanical engineers.  So we have no control over the switch design, and cannot control the bounce.  We just have to deal with it. Our two options are to design an electric circuit to deal with the bounce or write software code to deal with the bounce.  Since this course focuses on electrical design rather than software design, we chose a simple hardware debounce circuit. Datasheets sometimes recommend different debounce circuits or no debounce at all, but otherwise, this configuration is relatively standard.

 

One of the debounce circuits from the schematic.  In this circuit, a pullup resistor (R1) ties one side of the switch to the 3.3 V power rail and a low-pass filter connects the switch to the microcontroller and a 0.1 μF capacitor.

The circuit starts out with two resistors and one capacitor of unknown values.  R1 is simply a pull-up resistor while R2 and C1 form a low-pass filter. How did we select the values for R1, R2, and C1?  Start by separating the pull-up resistor from the low-pass filter.  

The next section explains the calculations for the circuit.

Circuit Analysis

When a potential difference exists across a resistor, charges move until the potential difference across the resistor is zero.  If there is no exit path for the charges, each unit of charge that crosses the resistor decreases the potential difference across the resistor ever so slightly, which then reduces the rate of charge flow.  This behavior is what gives RC circuits their characteristic exponential curvature.

RC-Filter

When Switch S1 is closed, R2 is connected directly to ground and R1 is simply generating heat, in that instance, C1 and R2 are the only components of interest in the RC-Filter.  When S1 is open, R2 is connected to Vcc through R1, so R1, R2 and C1 must be included in the filter calculations.

Capacitor Selection for RC-Filter

We can pick from a large array of capacitor values.  We need something with low equivalent series inductance (ESL) and low equivalent series resistance (ESR) and we need something that is inexpensive.  Those conditions all point towards small multilayer ceramic capacitors (MLCC). Since we're using 0.1 μF ceramics in dozens of spots in the circuit, we might as well use one here.  At this point, the choice is arbitrary, not calculated.

The switch datasheet states the settling time is 5 ms (0.005 s). If it was any greater, like the 10-20 ms seen in a relay, we might consider a larger-value capacitor in the 1 µF range.

Our goal is to design an RC circuit that transitions between Vcc and Logic Low in 5ms or greater.

Resistor Selection for RC-Filter During Discharge

\triangle t = 5\times10^{−3}\;\text{s} \hspace{10mm} C=0.1\times10^{−6}\;\text{F}

Vcc=3.3\;\text{V} \hspace{10mm} V_{\text{Logic Low Threshold}} = 1\;V

R_2=?

V_{\text{Logic Low Threshold}}=V_{\text{cc}}e^\frac{−\triangle t}{RC}\hspace{10mm}R_2=\frac{−\triangle t}{C\cdot ln(\frac{V_{\text{Logic Low Threshold}}}{V_{\text{cc}}})}

R_2=\frac{−5\times10^{−3}\;\text{s}}{0.1\times10^{−6}\;\text{F}\cdot ln(\frac{1\;V}{3.3\;V})}=41.9 k\Omega

And we’d pick a resistor of similar value from the E24-series, or 43 kΩ, with the large tolerances of the capacitors and resistors, it doesn’t make much sense to select a resistor more precise than this.

Pull-Up Resistor

The job of a pull-up resistor is to ensure a digital input is in a defined logic-state when no other circuit elements are acting on the input.  When the switch opens, the digital input “Dig” is connected to Vcc through the resistors R1 and R2, so they must both be included in the calculation.

Vcc=3.3\;\text{V} \hspace{5mm} V_{\text{Logic High Threshold}} = 2\;\text{V} \hspace{5mm} R_2=41.9\;k\Omega

R_1=?

V_{\text{Logic High Threshold}}=V_{\text{cc}}\left ( 1− e^\frac{−\triangle t}{(R_1+R_2)\cdot C}\right )

R_1=\frac{−\triangle t}{C\cdot ln(1−\frac{V_{\text{Logic High Threshold}}}{V_{\text{cc}}})}−R_2

R_1=\frac{−5\times10^{−3}\;\text{s}}{0.1\times10^{−6}\;\text{F}\cdot ln(1−\frac{2\;V}{3.3\;V})}−41.9\;k\Omega=12\;k\Omega

Lower Value Limit Caution

It’s not even close to a problem here, but if higher voltages are in play, a switch has a very low settling time, and a designer chooses a high value capacitance, it’s possible to have high currents flowing through the pull-up resistor.  

To choose the lowest allowable value for a resistor, circuit designers should look at the condition where the switch is closed and the net labeled TP is shorted to ground.  The current will flow from Vcc to Gnd nets through R1. A very low-value resistor will allow a great deal of current to flow across it. The limits are placed by the energy dissipation of the resistor and the current available from the power supply.  Many of these tiny resistors have power dissipation factors of around 1/10 W. Using Ohm's Law and the Power Law, we can find the resistance and current requirements quickly.

P=\frac{V^2}{R}

R=\frac{V^2}{P}

R=\frac{(3.3\;\text{V})^2}{0.1\;\text{W}}=110 \Omega

I=\frac{\triangle V}{R}

I=\frac{3.3\; V}{110\;\Omega}=30\;\text{mA}

30 mA can easily exceed the recommended power output of some small button-cell batteries. So we'd definitely want a resistor with a value greater than 110 Ω.  Also keep in mind that multiple switches might be depressed at once, causing a large drain on a tiny power supply. In that case, you should decrease the capacitance and increase the resistance to reduce the current through the pull-up resistor.

Each transition can cause electromagnetic noise and trigger the input on an integrated circuit.  Imagine the switch above used in a counting application.  Each switch press might be seen as 10 counts by an integrated circuit.

Hard Way Hughes"I think the last time I performed these calculations I was an undergraduate in college some 20 years ago.  Most of the time I look for an application example in the datasheet and Ctrl-C Ctrl-V the values into my schematic."

Dr. Bob"Do engineers even use external hardware debouncing anymore?  I think the trend over the last several years has been towards hardware debouncing inside the microcontroller, or software debouncing."

Additional resource:  https://my.eng.utah.edu/~cs5780/debouncing.pdf

8. Addressable RGB LEDs

LED Circuit

The Addressable RGB LEDs used in this circuit operate off of 5V power rail and 5V logic.  While we could probably get away with running them from 3.3V logic, if there is too much ground bounce and Vcc-sag inside the LEDs, we could run into trouble.  So a logic-level converter is created out of an N-channel MOSFET.  The circuit has a bypass and bulk capacitor for each LED to help reduce noise with the assumption that the LEDS can be placed far from one another.  The 0.1 uF capacitor should be placed as close to the LED as possible, with the 10 uF just on the other side of it.

9. Piezo Buzzer

When crystals are exposed to electric fields, they flex and deform. 

Stretched Crystal

This artistic interpretation of crystalline deformation is from an article on piezoelectrics at AllAboutCircuits.com

By attaching the crystal to a substance that doesn't flex in the presence of electric fields, differential stresses can be used to cause air molecules to vibrate at audible frequencies.  

Piezo Speaker

This animation of a piezoelectric speaker is from an article on piezoelectrics from AllAboutCircuits.com

Dr. Bob's piezo-electric buzzer uses a DC blocking capacitor in line with a piezo-electric element to create an audio buzzer for our badge.